CTCaer
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be3297ae1f
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l4t: raise T210 vdd2 limit to 1237.5mV
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2024-02-16 15:57:22 +02:00 |
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CTCaer
|
f05563579e
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bdk: max77620: raise sd1 max voltage
For T210.
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2024-02-16 15:55:40 +02:00 |
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CTCaer
|
644747230c
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bdk: dram: add FPGA code for 3rd gen micron
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2024-02-16 15:54:22 +02:00 |
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CTCaer
|
05f4c42a2d
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l4t: add custom options
That's a special flag config that controls ARC.
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2024-02-16 15:53:04 +02:00 |
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CTCaer
|
1f30b8deb7
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bdk: minerva: add custom option in table
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2024-02-16 15:51:02 +02:00 |
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CTCaer
|
6c518435ec
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nyx: add info about 3rd gen micron lpddr4x
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2024-02-14 02:18:01 +02:00 |
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CTCaer
|
25e48472c8
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nyx: add info about oem 5.5" panel
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2024-02-14 02:17:45 +02:00 |
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CTCaer
|
bfc6069b2d
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bdk: display: add OEM panel id
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2024-02-14 00:08:06 +02:00 |
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CTCaer
|
38a792e564
|
nyx: add penel rev and change some labels
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2024-02-12 04:14:14 +02:00 |
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CTCaer
|
8c5fdf52d4
|
nyx: correct dram info
Parse per module info on channel A, rank 0.
It was channel info on chip 0, rank0 before.
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2024-02-12 04:13:39 +02:00 |
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CTCaer
|
4576ed81ef
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sdram: acquire per chip mrr info
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2024-02-12 04:08:39 +02:00 |
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CTCaer
|
e9d2bdb124
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l4t: remove more redundant carveout cfg
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2024-01-07 12:40:28 +02:00 |
|
CTCaer
|
b37430dc1d
|
bdk: update copyright year
|
2024-01-07 12:38:10 +02:00 |
|
CTCaer
|
75543875e2
|
bdk: mc: remove some redundant carveout cfg
|
2024-01-07 12:33:29 +02:00 |
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CTCaer
|
cc50ed2051
|
l4t: remove redundant wpr cfg
It's now done in dram cfg.
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2024-01-06 22:09:18 +02:00 |
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CTCaer
|
d1bae553ec
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nyx: info: use the updated define for micron wtc
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2024-01-06 22:06:21 +02:00 |
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CTCaer
|
30c320d6e7
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bdk: sdram: update all ram info comments
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2024-01-06 22:05:24 +02:00 |
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CTCaer
|
eff27d92f2
|
bdk: sdram: update default wpr overrides
Since it's only used in L4T set them to the correct latest reg tool values.
HOS overrides them anyway.
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2024-01-06 22:03:54 +02:00 |
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CTCaer
|
3874840d77
|
bdk: sdram: update cfg for 8GB erista
|
2024-01-06 21:59:18 +02:00 |
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CTCaer
|
74e252aaf2
|
bdk: sdram: update latest reg tool vpr overrides
Set them to default config and remove them from patching.
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2024-01-06 21:58:51 +02:00 |
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CTCaer
|
c7333e710c
|
bdk: strtol: support unsigned 32bit hex
If base is 16 and input is not negative allow unsigned 32bit parsing.
This allows parsing numbers of up to 4294967295 in that case.
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2024-01-06 21:55:21 +02:00 |
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CTCaer
|
dab5eb9aa0
|
bdk: sprintf: do not accept null chars
Skip NULL chars on putc since they break the resulted string.
|
2024-01-06 21:52:48 +02:00 |
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CTCaer
|
92093ff08e
|
bdk: se: deduplicate sha hash extraction
|
2023-12-27 21:07:52 +02:00 |
|
CTCaer
|
2cc6cd45d9
|
bdk: dram: small refactor
|
2023-12-27 21:06:09 +02:00 |
|
CTCaer
|
a6ec41744b
|
bdk: sdram: refactor patching offsets
|
2023-12-27 21:04:04 +02:00 |
|
CTCaer
|
bb6e4deb4c
|
bdk: remove unused lp0 cfg from bdk
|
2023-12-27 21:02:33 +02:00 |
|
CTCaer
|
1522f1ee92
|
nyx: info: add max bus speed info for sd
|
2023-12-27 15:02:00 +02:00 |
|
CTCaer
|
41d3565353
|
bdk: sdmmc: deduplicate function modes get
And parse the whole info
|
2023-12-27 15:01:20 +02:00 |
|
CTCaer
|
e23d469f06
|
nyx: revamp jc/sio cal info dumping
Hoag:
- Add stick types
- Add imu type
All the rest:
- Add imu calibration info
- Add BT mac
|
2023-12-25 04:17:59 +02:00 |
|
CTCaer
|
bd1733c4fa
|
minerva: use min 2 divm
Adhere to software based imposed limits for T210.
|
2023-12-25 04:11:55 +02:00 |
|
CTCaer
|
db214f2865
|
l4t: correct debug print
|
2023-12-25 04:09:46 +02:00 |
|
CTCaer
|
b584a3f53a
|
bdk: add several defines
|
2023-12-25 04:08:34 +02:00 |
|
CTCaer
|
7f98fb736a
|
bdk: hwinit: reorder sdmmc1 reg disable
|
2023-12-25 04:07:26 +02:00 |
|
CTCaer
|
87c50732c0
|
bdk: fuse: simplify idle wait
|
2023-12-25 03:47:26 +02:00 |
|
CTCaer
|
504659a39b
|
bdk: actmon: switch to averaged sampling
|
2023-12-25 03:46:05 +02:00 |
|
CTCaer
|
e47a819948
|
bdk: se: add more useful functions
- aes cmac 128bit
- aes hashing
- option to clear updated aes iv
|
2023-12-25 03:44:52 +02:00 |
|
CTCaer
|
39abeb9a28
|
nyx: improve fuses info
Correct the Chip ID Revision and also add actual (derived) iddq values.
|
2023-12-25 03:33:37 +02:00 |
|
CTCaer
|
80a32304cb
|
nyx: rename 3rd gen hynix ram chips
|
2023-12-25 03:21:17 +02:00 |
|
CTCaer
|
913cdee8e8
|
bdk: sdram: rename 3rd gen t210b01 hynix ram
Confirmed to be a Hynix H54G46CYRBX267 and not a H9HCNNNBKMMLXR-NEI
|
2023-12-25 03:02:11 +02:00 |
|
CTCaer
|
eff55ff378
|
bdk: touch: rename samsung touch panel
BH2109 is the board model and not the touch panel.
|
2023-12-25 02:41:42 +02:00 |
|
CTCaer
|
09dfcfc57d
|
bdk: display: deduplicate interrupt code
|
2023-12-25 02:40:38 +02:00 |
|
CTCaer
|
239c48c790
|
bdk: usb: hid: improve stick calibration
Wait a bit before calibrating stick centers, in order to avoid bad values.
|
2023-12-25 02:37:40 +02:00 |
|
CTCaer
|
2e1a773a08
|
nyx: relax joycon calibration init
Wait a bit before actually doing stick calibration in order to avoid bad values.
|
2023-12-25 02:36:27 +02:00 |
|
CTCaer
|
d1ee0e35fd
|
hos: pkg2: fix validation check for nogc 17.0.0
|
2023-10-13 07:58:56 +03:00 |
|
CTCaer
|
226b30b57c
|
Bump hekate to v6.0.7 and Nyx to v1.5.6
|
2023-10-12 09:25:14 +03:00 |
|
CTCaer
|
7fab13b76d
|
hos: correct meso version masking
And also use the version instead to decide for relative INI1 base setting.
That's because MSS0 and MSS1 come with prepopulated INI1 base.
|
2023-10-12 09:25:06 +03:00 |
|
CTCaer
|
d3d3768c8f
|
hos: correct max KB
|
2023-10-12 08:07:46 +03:00 |
|
CTCaer
|
7040f1ada2
|
l4t: allow setting dram voltage even if no OC
Mostly for allowing undervolting.
|
2023-10-12 07:44:00 +03:00 |
|
CTCaer
|
697bde8667
|
hos: 17.0.0 support
|
2023-10-12 07:41:12 +03:00 |
|
CTCaer
|
03f11370c7
|
hos: allow reusage of embedded INI1 region
|
2023-10-12 07:36:00 +03:00 |
|