forked from CTCaer/hekate
bdk: fuse: simplify idle wait
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504659a39b
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87c50732c0
@ -167,11 +167,8 @@ int fuse_set_sbk()
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void fuse_wait_idle()
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{
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u32 ctrl;
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do
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{
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ctrl = FUSE(FUSE_CTRL);
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} while (((ctrl >> 16) & 0x1f) != 4);
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while (((FUSE(FUSE_CTRL) >> 16) & 0x1F) != FUSE_STATUS_IDLE)
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;
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}
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u32 fuse_read(u32 addr)
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@ -255,11 +255,32 @@
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#define FUSE_SPARE_BIT_31 0x3FC
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/*! Fuse commands. */
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#define FUSE_IDLE 0x0
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#define FUSE_READ 0x1
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#define FUSE_WRITE 0x2
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#define FUSE_SENSE 0x3
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#define FUSE_CMD_MASK 0x3
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/*! Fuse status. */
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#define FUSE_STATUS_RESET 0
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#define FUSE_STATUS_POST_RESET 1
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#define FUSE_STATUS_LOAD_ROW0 2
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#define FUSE_STATUS_LOAD_ROW1 3
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#define FUSE_STATUS_IDLE 4
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#define FUSE_STATUS_READ_SETUP 5
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#define FUSE_STATUS_READ_STROBE 6
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#define FUSE_STATUS_SAMPLE_FUSES 7
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#define FUSE_STATUS_READ_HOLD 8
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#define FUSE_STATUS_FUSE_SRC_SETUP 9
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#define FUSE_STATUS_WRITE_SETUP 10
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#define FUSE_STATUS_WRITE_ADDR_SETUP 11
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#define FUSE_STATUS_WRITE_PROGRAM 12
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#define FUSE_STATUS_WRITE_ADDR_HOLD 13
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#define FUSE_STATUS_FUSE_SRC_HOLD 14
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#define FUSE_STATUS_LOAD_RIR 15
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#define FUSE_STATUS_READ_BEFORE_WRITE_SETUP 16
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#define FUSE_STATUS_READ_DEASSERT_PD 17
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/*! Fuse cache registers. */
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#define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x))
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