forked from CTCaer/hekate
bdk: display: remove max77620 gpio 7 enable
It is actually not used at all. So do not configure it to save power.
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8d49bc3c33
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14c482ddce
@ -373,13 +373,10 @@ void display_init()
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// Get Chip ID.
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bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210;
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// Enable LCD DVDD.
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// Enable DSI AVDD.
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max7762x_regulator_set_voltage(REGULATOR_LDO0, 1200000);
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max7762x_regulator_enable(REGULATOR_LDO0, true);
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if (tegra_t210)
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max77620_config_gpio(7, MAX77620_GPIO_OUTPUT_ENABLE); // T210: LD0 -> GPIO7 -> LCD.
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// Enable Display Interface specific clocks.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_CLR) = BIT(CLK_H_MIPI_CAL) | BIT(CLK_H_DSI);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = BIT(CLK_H_MIPI_CAL) | BIT(CLK_H_DSI);
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@ -791,6 +788,10 @@ skip_panel_deinit:
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{
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gpio_write(GPIO_PORT_I, GPIO_PIN_1, GPIO_LOW); // LCD AVDD -5.4V disable.
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gpio_write(GPIO_PORT_I, GPIO_PIN_0, GPIO_LOW); // LCD AVDD +5.4V disable.
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// Make sure LCD PWM backlight pin is in PWM0 mode.
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gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight PWM.
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PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = PINMUX_TRISTATE | PINMUX_PULL_DOWN | 1; // Set PWM0 mode.
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}
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usleep(10000);
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@ -805,14 +806,7 @@ skip_panel_deinit:
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DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF);
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DSI(_DSIREG(DSI_POWER_CONTROL)) = 0;
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// Switch LCD PWM backlight pin to special function mode and enable PWM0 mode.
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if (!_nx_aula)
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{
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gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight PWM.
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PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = PINMUX_TRISTATE | PINMUX_PULL_DOWN | 1; // Set PWM0 mode.
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}
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// Disable LCD DVDD.
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// Disable DSI AVDD.
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max7762x_regulator_enable(REGULATOR_LDO0, false);
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}
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@ -300,7 +300,7 @@ static void _config_regulators(bool tegra_t210, bool nx_hoag)
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gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_LOW);
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sd_power_cycle_time_start = get_tmr_ms();
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// Disable LCD DVDD to make sure it's in a reset state.
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// Disable DSI AVDD to make sure it's in a reset state.
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max7762x_regulator_enable(REGULATOR_LDO0, false);
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K);
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